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Sr. RFIC Integration Engineer
Apple, Inc. | |
United States, California, Irvine | |
November 16, 2022 | |
Summary
Posted: Oct 14, 2022 Role Number:
200377358 Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level, all of which is driven by a best-in-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As the Sr. RFIC Integration engineer, you will be at the center of a wireless SoC design group with a critical impact on getting Apple's state-of-the-art wireless connectivity solutions into hundreds of millions of products. Key Qualifications
Description As a Sr. RFIC Integration engineer, you will be a key member of an RFIC design team, integrating and bringing the next-generation wireless SoCs into high-volume production at advanced CMOS technology nodes for Apple products. Responsibilities include: - Top level design including schematic hierarchy, floor planning, timing closure, and top-level releases to the SOC team. - Close interaction with the RFIC and AMS IC designers, Modeling and DV teams in defining, modeling and - Overseeing the layout and verifying the design to ensure a successful tape-out. - Collaborating with the SOC team, PHY, RTL, and PD team on the analog-digital interface, partitioning of the digital content, static and dynamic controls and registers within radio. - Working closely with the CAD team on the release flows. - Working with Program Managers to meet the deliverable timelines for various stages in a wireless product development. - Cross functional collaboration with Platform Architecture, Systems, Digital Design and RF Hardware teams. - Working closely with RF DVT team for a successful bring up of the chip, and support in the lab for debug and optimization when silicon is back. Education & Experience MSEE required; PhD preferred Additional Requirements
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