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FPGA Engineer II

QSC
401(k)
United States, California, Costa Mesa
1675 MacArthur Boulevard (Show on map)
May 13, 2025

FPGA Engineer II
Job ID

2025-4732



Job Locations

US-CO-Boulder | US-CA-Costa Mesa

Category
R&D

Type
Regular Full-Time



Overview

By joining the QSC team, you will be in a challenging, collaborative, fun, and innovative environment. We encourage employees to take ownership, to color outside the lines, and to imagine possibilities. Our culture is casual but dynamic, with cross-functional teams collaborating on creating memorable audio-visual experiences that deliver joy to people, wherever they are. At QSC, fun and hard work go hand in hand. Join us and make a difference in the way people experience movies, meetings, presentations, live performances, and much more.

The FPGA Verification Engineer II is a junior-level position focused on verifying and validating FPGA designs for both existing and future audio and video products. This role requires a solid understanding of FPGA design principles and verification methodologies. The engineer will work closely with senior team members to ensure that designs meet all functional and performance specifications. Responsibilities include developing and executing test plans, debugging issues, and collaborating with cross-functional teams to deliver high-quality products. This position offers an excellent opportunity to grow technical skills and contribute to innovative projects within the company.

Location Requirements: This is an onsite role requiring the candidate sit in either our Boulder, CO or Costa Mesa, CA offices. Candidates outside of these areas will not be considered.

Base Salary Range 94,000 - 105,000

The above reflects the pay range that QSC reasonably expects to pay for this role. This pay range also depends on various factors such as job duties and requirements, relevant experience and skills and geographic location. In addition to the base salary range, QSC offers a comprehensive package including but not limited to health benefits, 401K or Roth retirement plans and generous time off.

We will be accepting applications until a final candidate is identified.



Responsibilities

    Create detailed test plans to verify FPGA designs, ensuring all functional and performance specifications are met
  • Develop and maintain testbenches to simulate various scenarios and validate the functionality of FPGA designs
  • Perform hands-on testing of FPGA designs using lab equipment such as Xilinx ILA, external logic analyzers, and oscilloscopes
  • Develop and maintain build scripts to automate the FPGA build process, including the integration of verification testbenches
  • Work closely with cross-functional teams to debug and resolve issues, ensuring high-quality FPGA designs


Qualifications

  • B.S. in Electrical Engineering, Computer Science, or Computer Engineering
  • Minimum of 2 years of work experience in an FPGA development environment
  • Minimum of 2 years of hands-on experience in FPGA verification and/or design with Verilog/System Verilog or VHDL
  • Proficiency in HDL languages, particularly System Verilog.
  • Familiarity with FPGA design tools like Xilinx Vivado and simulators.
  • Proven understanding of digital design fundamentals and architectural concepts
  • Familiarity with protocols such as: DDR, PCIe, HDMI, DisplayPort, AXI4, I2C, SPI
  • Proficiency in using lab equipment such as oscilloscopes, logic analyzers, and spectrum analyzers.
  • Strong analytical and problem-solving skills.
  • Hands on experience with scripting languages such as: TCL, Bash, Python, Make
  • Hands on experience with Linux operating systems
  • Hands on experience with source control tools such as Git
  • Ability to produce results in a dynamic work environment


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