Wafer Fab Integration Engineer

The Microcircuit Emulation Center at SRI International (formerly Sarnoff Corporation) is looking for a Wafer Fab Integration Engineer to support the manufacturing of microcircuits (integrated circuits) on-site at our Princeton, NJ office.

Through SRI's Generalized Emulation of Microcircuits (GEM) program, the Microcircuit Emulation Center supplies form, fit, function, and interface replacements for obsolete microcircuits. This capability supports production, redesign, and sustainment requirements for the life of a weapon system. SRI's Microcircuit Emulation Center is a government-supported, U.S.-based Trusted foundry.

Develop and maintain process flows as needed to expand and sustain production technologies. Tasks include creation of full process flows, wafer lot experimental planning and execution, simulation, etc.
• Support efforts to maintain wafer disposition, inspection, and wiptrack programs using metrology, data analysis, etc.
• Provide hands-on engineering support for wafer fabrication and process as required
• Provide technical expertise in process integration and work collaboratively with staff across groups in resolving technical issues and maintaining technology sets
• Support development, implementation, and maintenance of wafer level parametric data
• Lead efforts to create experimental plans and execution using industry best practices
• Work collaboratively with staff across all disciplines to organize, correlate, and present data
• Work for extended periods of time in a cleanroom environment
• On rare occasions may be required to perform shift work

• A minimum BS in electronic engineering, physics, chemistry, or an equivalent field
• Due to Government requirements candidates must be a US Citizen or Permanent Resident
• Experience or knowledge in the semiconductor industry with a minimum of 5 years practical experience
• Knowledge and experience of CMOS, BiCMOS, and Bipolar process technologies is required
• Demonstrated analytical and systematic teamwork approach to troubleshooting

Desired:

• Process integration experience at 0.5- and 0.35-micron CMOS technologies are preferred
• Previous experience working with MESA wiptrack system is advantageous
• Strong communication skills, both verbal and written

The salary range is: $111,474-$147,699. Salary ranges will vary and are based on several factors, including geographic location, market competitiveness and equity amongst internal employees in similar roles. Positions may also qualify for SRI's Pay for Outstanding Performance program or the annual Performance Based Compensation program. SRI also has a competitive benefits package, to view details please go to https://www.sri.com/resources/benefits/.

SRI is an independent nonprofit research institute headquartered in Menlo Park, Calif., with a rich history of supporting government and industry. We create and deliver world-changing solutions for a safer, healthier, and more sustainable future. For more than 75 years, we have collaborated across technical and scientific disciplines to discover and develop groundbreaking products and technologies and bring innovations and ideas to the marketplace.