Research Scientist -- FPGAs

As we approach the forecasted "death" of Moore's law, compute platform architectures need to rely on increasingly complex compositions of different types of hardware resources to achieve mission objectives with acceptable SWAP-C. The proof may be right in your pocket with modern smartphones combining high-performance cores, low-power cores and GPUs to offer optimal user experience.

From the security perspective, heterogeneous architectures offer exciting new capabilities while at the same time threatening platform security by adding complexity. In Riverside Research's Secure and Resilient Systems group, we study security in foundational system layers including operating systems, hypervisors, and compilers. However, modern heterogeneous compute platforms demand hardware-inclusive solutions as well.

Riverside research is seeking a research scientist to provide a hardware perspective in low-level software security projects. The research scientist will work with the group to design and implement experiments and prototypes to validate security-focused hypotheses. The research scientist will need to balance technical depth with strong communication skills to work within an interdisciplinary technical team and communicate requirements and results to internal and external program management.

Although expertise in any of these particular domains is not required, a good candidate for this role would be interested in discussing cutting-edge research topics such as:

Automatic translation of programming language code to FPGA circuits (IE high level synthesis)
• Offensive and defensive capabilities offered by arbitrary control of the fabric in a tightly-coupled FPGA on an SOC like the Xilinx Zynq
• The level of introspection possible from peripheral busses like PCIe
• Program partitioning for platforms with heterogeneous compute
• Security-focused ISAs (or ISA extensions) like CHERI / ARM Morello

• Help the group design innovative solutions to customer problems related to systems that include FPGAs or other diverse hardware features
• Prototype and evaluate features on FPGA hardware using both pre-existing IP cores and custom logic
• Build new tools and/or capabilities in a range of relevant HDL & programming languages
• Contribute to whitepapers and/or published papers that document innovative work preformed
• Document and communicate design decisions, technical challenges, and progress to technical program management
• Collaborate with team members on debugging programs, pair programming, reviewing papers/proposals, etc.
• Participate in relevant internal and customer meetings

Required Qualifications:

• Bachelor's degree with 2+ years experience, or MS degree preferred in related technical field, such as computer science, computer engineering, electrical engineering, or cybersecurity
• Strong software development fundamentals for working inside a large project (e.g., submitting PRs, interacting with open-source communities and mailing lists, git branches/merges/rebasing, build systems, etc)
• Must be eligible to obtain a Top Secret security clearance.
• Communication and creative skills to develop, prototype, benchmark, and document significant security features integrated into existing systems security technologies
• Fluency in one or more hardware description languages (e.g., Verilog, VHDL)
• Experience using Xilinx Vivado IDE
• Comfort with programming in C/C++, Python, and at least one assembly language

Desired Qualifications:

• PhD degree in Computer Science or related field
• Strong grasp on the research process (e.g., reading & writing academic papers, ideation for inventing solutions to hard problems)
• Healthy balance between technical orientation and business acumen
• Ability to operate independently with limited supervision and feedback, and establish a solid working relationship with peers in the group and across Riverside Research
• Self-starter and ability to manage time and technical tasks independently without direct supervision
• Superior written and verbal communications skills
• Experience with leveraging GPUs in a heterogeneous compute environment
• Understanding of the software-hardware interface including kernel driver development experience