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Principal Engineer - Physical Design

Microchip Technology Inc
United States, Arizona, Chandler
2355 West Chandler Boulevard (Show on map)
Oct 02, 2024

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

To support Physical Design-related project activities for the multiple 32-bit Business Units in Microchip. The product's focus is on microprocessors, microcontrollers, and wireless design and implementation.

  • Implement all aspects of physical design, such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance, and physical verification.
  • Perform all aspects of Chip Power Integrity for multiple voltage domains, such as IR drop analysis, signal EM, and Power EM
  • Utilize hierarchical systems-level design techniques to build designs exceeding multi-million gates.
  • Work on the place and route methodologies and low power methodologies.
  • Must be a self-motivated team player who can collaborate with multiple teams across a geographically diverse company to achieve desired design goals.

Detailed job functions include:

  • Timing closure support to maximize process node capability.
  • Clock tree setup/debug and synthesis for optimal QoR.
  • General physical implementation procedures.
  • Multi-voltage island-based floorplan design and support.
  • Flow development and automation implementation.
  • Delivering Physical Verification-clean designs.
  • Die size estimation and Bond out approval.
  • Interfacing with external vendors and IP sources to resolve problems.
  • Working with members from international design/implementation teams.

Requirements/Qualifications:

The successful candidate will have a minimum of 10+ years or more applicable technical experience in the physical and timing-related aspects of IC design. The design task requires experience in the following Physical Design- related activities:

  • Advanced knowledge of VLSI logic principles, Power integrity and reliability (EM & IR) analysis.
  • Advanced knowledge of place and route methodologies and low power methodologies.
  • Knowledge of clock tree synthesis & debug, and design timing closure.
  • Experience with 40nm technologies and beyond is required.
  • Detailed systems-level floorplanning.
  • Power network planning.
  • Multi-voltage/low power implementation techniques.
  • Detailed knowledge of ICC/ICC2 or Innovus and Redhawk toolsets.
  • Proficiency in Tcl and Perl scripting is essential.
  • Excellent debugging and analytical skills.
  • Good verbal and written communication skills and strong interpersonal skill

Travel Time:

0% - 25%

Physical Attributes:

Feeling, Hearing, Seeing, Talking

Physical Requirements:

80% sitting, 10% standing, 100% inside

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the EEO is the Law Poster and the EEO is the Law Poster Supplement. Please also refer to the Pay Transparency Policy Statement.

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