Sr Technical Staff Engineer - CAD (Parasitic Extraction)
Microchip Technology Inc | |
United States, California, San Jose | |
3850 North First Street (Show on map) | |
Oct 08, 2024 | |
Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: The CAD group at Microchip provides global support for multiple technology nodes and tools used in product development providing innovative solutions for the design community. The candidate will focus on flow development and support for parasitic extraction. * Support Layout and Design Engineers with parasitic extraction using tools such as Siemens/Mentor Graphics Calibre xRC, xACT, Synopsys StarRC, and Cadence Quantus * Develop regression test cases to QA parasitic extraction tools and flows * Validate and install process design kit parasitic extraction technology files * Support design teams with debug of simulation, static timing analysis, etc. * Support remote sites worldwide Requirements/Qualifications: * BS/MS degree in Electrical Engineering, Computer Engineering, Material Sciences with 12+ years of expereience. * Linux / Unix * Programming skills in language like Python, Perl, TCL, shell * Excellent written and verbal communication skills * Exposure to semiconductor EDA tools * Layout concepts and scripting skills * Experience with Seimens/Mentor Graphics Calibre xRC, Synopsys StarRC, or Cadence Quantus Travel Time: 0% - 25%Physical Attributes: Feeling, Handling, Hearing, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements: 70% sitting, 15% standing, 15% walking. Regular business hours.Pay Range: We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:Benefits of working at Microchip The annual base salary range for this position, which could be performed in California, is $88,000 - $232,000.**Range is dependent on numerous factors including job location, skills and experience. Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. |