Senior ASIC Design Verification Engineer

Cisco Systems, Inc.
United States, California, San Jose
170 W Tasman Dr (Show on map)
May 29, 2025
The application window is expected to close on May 30, 2025. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This role requires being onsite in San Jose, CA 4+ days/week. Who We Are The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We craft the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations worldwide. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from top-of-rack (TOR) switches through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Join us and shape Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being created in the industry. Who You'll Work With You will work with outstanding talent and vast ASIC development expertise in design, DV, DFT, physical design, and post-silicon validation The team comprises micro-architects, front-end designers, and verification engineers. Cisco is a system company, so you can also use the ASIC to work with the System and Software teams and participate in the journey from sample arrival through system validation to first customer shipments. What You'll Do You will participate in the ASIC design verification for Cisco high-end switching products. Development of simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis. Collaborate with the hardware, software designers, and vendors. Who You Are You can take on problems of moderate scope involving multiple modules, work under general supervision, and follow established procedures. You understand product-level architecture. Exercise judgment within defined standards and consult with management. Promote collaboration with team members. Minimum Qualifications: Bachelor's degree in electrical or computer science or computer engineering with 7 years of related experience or Master's in electrical or computer science or computer engineering combined with 5 years of related experience Experience in System Verilog/UVM. Experience with ASIC design and verification processes, debugging, methodology, and tools. Experience in verifying blocks/clusters/full chip level for ASIC. Preferred Qualifications: Post-silicon lab bring-up experience is a plus. Knowledge of Linux is needed. C/C++ and Python/Perl are preferred. Knowledge of Networking is preferred. Experience with Formal verification is a plus. Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put - we power the future. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you.