Silicon Front End CAD-DV Engineer
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![]() United States, Texas, Austin | |
![]() 233 Mount Airy Road (Show on map) | |
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Grow with us
Silicon Front End CAD - DV Engineer (ASIC/FPGA) Ericsson Inc. does not sponsor US work authorizations for this job position including H-1B, O-1, and TN. Ericsson also does not hire F-1's working on EAD for this position. This is not a remote opportunity. Are you a hands-on engineer and ready to shape the future of silicon verification methodology and tools on a global scale? Join our Design Verification Methodology team - a newly established global group defining methodologies and EDA workflows across our R&D sites in Austin, Stockholm, and Lund. About Us We are part of the Ericsson Silicon engineering unit, developing state-of-the-art ASICs and FPGAs at advanced technology nodes for Ericsson's 5G and 6G product portfolio. Our environment offers deep technical challenges, opportunities for growth, and a wealth of expertise to learn from. About this position: In this high-visibility role, you will shape the next generation of Front-End CAD (FECAD) methodologies, DV flows, and infrastructure for ASIC IP and SoC development. Your impact will be central in optimizing methodologies and EDA workflows, driving efficiency and innovation across our global silicon engineering community. We are particularly interested in individuals with exposure to or interest in applying AI/ML techniques to silicon design and verification - a significant plus as we invest in AI-driven design automation. If you thrive on solving technical challenges, spotting opportunities for improvement, and driving continuous innovation, we'd love to have you on our team. What you will do: * Lead the development, deployment, and support of complex front-end DV tool flows. * Identify and solve flow, methodology, and tool inefficiencies across IP/ASIC/SoC environments; productize solutions to improve silicon quality and verification productivity. * Drive innovation in design and verification processes, including AI-based enhancements. * Collaborate closely with design, verification, test, and manufacturing teams to align on methodology, quality, and timelines. * Troubleshoot technical challenges and implement scalable, long-term solutions. * Foster a collaborative, forward-looking culture within the verification community. What you will bring: * Deep expertise in Testbench Architecture using SystemVerilog and UVM at IP, ASIC, and/or SoC level. * Strong knowledge of layered UVM environments, reusable testbench components, and block/subsystem/SoC-level verification strategies. * Solid understanding of directed and constrained-random verification, SVA, functional and code coverage closure. * Proficiency with front-end EDA tools: Verilog simulators, RTL/verification linters, CDC checkers, and formal verification. * Familiarity with synthesis, STA, and DFT concepts. * Experience with CI methodologies and tools (e.g., Jenkins). * Proficiency in scripting (Python, Perl, bash, csh, etc.). * Strong grasp of modern silicon design methodologies and verification best practices. * Experience collaborating across geographically distributed teams. * Excellent communication skills and a strong sense of ownership in solving complex infrastructure challenges. * Bonus: Exposure to AI/ML applications in design and verification flows (e.g., testbench optimization, anomaly detection, coverage prediction) is a significant advantage. Education & Experience * BS/MS in Electrical Engineering, Computer Science, or related field. * Several years of relevant experience in ASIC/FPGA design verification What happens once you apply? Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets. We truly believe this approach drives innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity employer, learn more. If you need assistance or to request an accommodation due to a disability, please contact Ericsson at hr.direct.americas@ericsson.com. DISCLAIMER: The above statements are intended to describe the general nature and level of work being performed by employees in this position. They are not an exhaustive list of all responsibilities, duties and skills required for this position, and you may be required to perform additional job tasks as assigned. Primary country and city: USA || Austin, Texas Job details: Developer Recruiter name: Jim Everett Compensation and Benefits at Ericsson Your Pay The salary range for this position is * LOCATION: Texas, $175,000 to $225,000 Short-Term Variable Compensation Plan: Your pay also includes the opportunity for an annual bonus. Actual bonus payouts are based on performance of the business against the unit's objectives, individual performance, and the individual bonus target. Certain eligibility and pro-ration rules apply. Your Health Your Financial Security We invest in both your short and long-term financial wellbeing. The Ericsson US 401(k) Plan offers an automatic 3% company contribution and Ericsson matches $1 for every $1 you put into the 401(k) Plan on the first 3% of your eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay. When you contribute at least 5% of eligible pay, you are receiving Ericsson's full matching contributions. Matching and company automatic contributions stop when your total eligible pay for the year reaches the IRS limits. Employees will also receive company credits in an amount equal to the cost of basic life insurance and basic accidental death and dismemberment coverage, as well as short-term and long-term disability coverage. Employees also have the option to participate in Ericsson's Stock Purchase Plan. Your Time Additional Benefits |