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Design Verification Engineer

Advanced Micro Devices, Inc.
$139,360.00/Yr.-$209,040.00/Yr.
United States, Texas, Austin
7171 Southwest Parkway (Show on map)
Jan 27, 2026


WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:

Join the Radeon Technologies Group at AMD and be at the forefront of innovation in silicon design. As a key player in our front-end design and integration team, you will collaborate with top-tier professionals across architecture, IP design, physical design, and product engineering to ensure first-pass silicon success. Your contributions will directly impact the creation of cutting-edge technologies that drive the future of computing.

THE PERSON:

The ideal candidate will thrive in a collaborative environment, working closely with senior silicon design engineers. They will be highly accurate and detail-oriented, with exceptional communication and problem-solving skills. Additionally, they will possess strong interpersonal abilities, demonstrating teamwork, adaptability, and a proactive approach to challenges. A passion for innovation and a commitment to continuous learning are essential for success in this role.

KEY RESPONSIBLITIES:

  • Write tests, sequences, and testbench components in SystemVerilog and UVM along with formal to achieve verification of the design.
  • Coordinate with RTL engineers to implement logic design for better clock gating and verify the various aspects of the design.
  • Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture.
  • Collaborate with architects, hardware engineers and multiple IP development groups.
  • Drive formal verification for the block and write formal properties andassertions to verify the design
  • Responsible for verification quality metrics like pass rates, code coverage and functional coverage

PREFERRED EXPERIENCE:

  • Architected and developed complex verification environments in SystemVerilog or C++ and infrastructure, including scripting using Perl, Ruby, Make, or the likes.
  • Exposure to RTL design, software development, formal verification, or other related domains.
  • Good understanding of computer organization/architecture.
  • Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering preferred

#LI-MR1

#LI-Hybrid

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.

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