Research Engineer II- Semiconductor Fabrication and Advanced Packaging

Georgia Tech prides itself on its technological resources, collaborations, high-quality student body, and its commitment to building an outstanding and diverse community of learning, discovery, and creation. We strongly encourage applicants whose values align with our institutional values, as outlined in our Strategic Plan. These values include academic excellence, diversity of thought and experience, inquiry and innovation, collaboration and community, and ethical behavior and stewardship. Georgia Tech has policies to promote a healthy work-life balance and is aware that attracting faculty may require meeting the needs of two careers.

About Georgia Tech

Georgia Tech is a top-ranked public research university situated in the heart of Atlanta, a diverse and vibrant city with numerous economic and cultural strengths. The Institute serves more than 45,000 students through top-ranked undergraduate, graduate, and executive programs in engineering, computing, science, business, design, and liberal arts. Georgia Tech's faculty attracted more than $1.4 billion in research awards this past year in fields ranging from biomedical technology to artificial intelligence, energy, sustainability, semiconductors, neuroscience, and national security. Georgia Tech ranks among the nation's top 20 universities for research and development spending and No. 1 among institutions without a medical school.

Georgia Tech's Mission and Values

Georgia Tech's mission is to develop leaders who advance technology and improve the human condition. The Institute has nine key values that are foundational to everything we do:

1. Students are our top priority.
2. We strive for excellence.
3. We thrive on diversity.
4. We celebrate collaboration.
5. We champion innovation.
6. We safeguard freedom of inquiry and expression.
7. We nurture the wellbeing of our community.
8. We act ethically.
9. We are responsible stewards.

Over the next decade, Georgia Tech will become an example of inclusive innovation, a leading technological research university of unmatched scale, relentlessly committed to serving the public good; breaking new ground in addressing the biggest local, national, and global challenges and opportunities of our time; making technology broadly accessible; and developing exceptional, principled leaders from all backgrounds ready to produce novel ideas and create solutions with real human impact.

Atlanta, GA

The Institute for Matter and Systems (IMS), an Interdisciplinary Research Institute at Georgia Tech, solves societal, technological, and scientific challenges by integrating knowledge, methods, and expertise across disciplines:

• Fundamental science to comprehend and control matter from the nanoscale to the mesoscale.

• The synthesis, processing, and characterization of materials to achieve desired properties.

• The design and fabrication of novel devices and components with enhanced capabilities.

• The integration of materials, devices, and components into larger systems.

• Computing, modeling, simulation, and big data to advance progress at all length scales.

• Integration of economic, business, and social factors to ensure sustainable and equitable benefits in all stages of research, from conceptualization to impact.

IMS enables interdisciplinary research in areas including:

• Microelectronic technologies that efficiently sense, process, store, and communicate information while addressing issues related to security, privacy, and inequality.

• Built environment technologies for sectors such as automotive, infrastructure and energy that enhance strength, sustainability, reliability, resiliency, and efficiency.

• Human-centric technologies that improve human health, wellness, and performance.

• Frontiers in research infrastructure such as characterization, modeling, simulation, and artificial intelligence that impact numerous technologies.

The Research Engineer II will support and lead semiconductor fabrication, advanced packaging, and heterogeneous integration activities within the IMS Cleanroom Facilities. This role involves hands-on process development, tool ownership, and research execution across TSV/TGV processing, electroplating, wafer thinning, planarization, CMP, and MEMS/sensor fabrication in a multi-user research environment.

The position supports collaborative research initiatives involving materials development, interconnect technologies, high-density integration, and system-level packaging solutions for next-generation electronic and sensor platforms.

Support heterogeneous integration research through materials selection, interconnect process development, and multi-layer device integration.

Develop and optimize process flows for TSV/TGV fabrication, copper electroplating and RDL formation, wafer thinning (grinding), planarization and CMP, advanced packaging integration, and MEMS/sensor fabrication.

Design and execute experimental studies, analyze process data, and establish stable, documented baselines to ensure reproducibility and reliability.

Serve as technical owner for fabrication and packaging tools (e.g., DRIE/ICP systems, electroplating systems, grinding and CMP tools, and thin-film deposition systems)

Train and support academic and industry users on cleanroom processes and equipment.

Troubleshoot process and equipment issues and coordinate maintenance and continuous improvement efforts.

Collaborate with faculty, students, and industry partners on prototype development, sponsored research activities, and technical deliverables.

For Rank of Research Engineer II

• A master's degree in science, engineering or related area, and three (3) years of relevant full-time experience after completion of that degree, or
• A master's degree in science, engineering or related area, and five (5) years of relevant full-time experience after completion of a bachelor's degree, or
• Doctoral degree

Master's degree or Ph.D. in Electrical Engineering, Materials Science, Mechanical Engineering, Chemical Engineering, or a related field.
Experience in semiconductor fabrication and advanced packaging process development.
Hands-on expertise in several of the following areas: DRIE/ICP etching, thin-film deposition (ALD/PVD/CVD), electroplating, TSV/TGV processing, wafer thinning, planarization, CMP, or packaging assembly.
Experience with high-aspect-ratio via processing and copper fill optimization.
Background in heterogeneous integration or wafer-level packaging.
Experience in MEMS or sensor fabrication.
Prior experience in an academic cleanroom or semiconductor R&D environment.
Demonstrated ability to support research projects and contribute to technical documentation, reports, or publications.

Please list 3 professional references.

For additional information about this job opening, please contact Cecelia Jones, Cecelia.jones@gatech.edu

The University System of Georgia is comprised of our 25 institutions of higher education and learning as well as the System Office. Our USG Statement of Core Values are Integrity, Excellence, Accountability, and Respect. These values serve as the foundation for all that we do as an organization, and each USG community member is responsible for demonstrating and upholding these standards. More details on the USG Statement of Core Values and Code of Conduct are available in USG Board Policy 8.2.18.1.2 and can be found on-line at https://www.usg.edu/policymanual/section8/C224/#p8.2.18_personnel_conduct.

Additionally, USG supports Freedom of Expression as stated in Board Policy 6.5 Freedom of Expression and Academic Freedom found on-line at https://www.usg.edu/policymanual/section6/C2653.

The Georgia Institute of Technology (Georgia Tech) is an Equal Employment Opportunity Employer. The Institute is committed to maintaining a fair and respectful environment for all. To that end, and in accordance with federal and state law, Board of Regents policy, and Institute policy, Georgia Tech provides equal opportunity to all faculty, staff, students, and all other members of the Georgia Tech community, including applicants for admission and/or employment, contractors, volunteers, and participants in institutional programs, activities, or services. Georgia Tech complies with all applicable laws and regulations governing equal opportunity in the workplace and in educational activities.

Equal opportunity and decisions based on merit are fundamental values of the University System of Georgia ("USG") and Georgia Tech. Georgia Tech prohibits discrimination, including discriminatory harassment, on the basis of an individual's race, ethnicity, ancestry, color, religion, sex (including pregnancy), national origin, age, disability, genetics, or veteran status in its programs, activities, employment, and admissions. Further, Georgia Tech prohibits citizenship status, immigration status, and national origin discrimination in hiring, firing, and recruitment, except where such restrictions are required in order to comply with law, regulation, executive order, or Attorney General directive, or where they are required by Federal, State, or local government contract.

This is not a supervisory position.
This position does not have any financial responsibilities.
This position will not be required to drive.
This role is not considered a position of trust.
This position does not require a purchasing card (P-Card).
This position will not travel
This position does not require security clearance.

Successful candidate must be able to pass a background check. Please visit http://policylibrary.gatech.edu/employment/pre-employment-screening