We use cookies. Find out more about it here. By continuing to browse this site you are agreeing to our use of cookies.
#alert
Back to search results
New

Staff Mechanical Design Engineer

Marvell Semiconductor, Inc.
May 26, 2026

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

We are seeking a Staff Mechanical Design Engineer to join our Advanced Technology Infrastructure team, responsible for the mechanical architecture and detailed design of high performance semiconductor test infrastructures including sockets, optical connectors, silicon photonics FAUs, and thermal head assemblies. This role focuses on delivering mechanically robust, tolerance aware, and production ready designs that enable reliable electrical and thermal systems for next generation high power XPU and Silicon Photonics platforms.

You will lead mechanical design efforts spanning precision tolerance management, compliant mechanisms, fluid integrated structures, and scalable architectures, working closely with thermal, packaging, test, and manufacturing partners.

This position is ideal for an engineer who excels at turning complex mechanical constraints into elegant, manufacturable designs and enjoys driving hardware from concept through high volume deployment.

What You Can Expect

  • Own mechanical design and CAD development of test sockets, thermal heads, pedestals, handler design and loading mechanisms for highpower semiconductor validation platforms

  • Participate in tolerance stackup analysis, managing TIM bondline thickness (BLT) and contact stack compliance to prevent die cracking, excessive contact resistance, and reliability degradation

  • FAU design, CPC connector design, Silicon Photonics Test infrastructure development

  • Develop compliant mechanical designs, including springs, flexures, and preload structures, to absorb socket manufacturing tolerances and handler misalignment

  • Design sockettothermalhead integration features, ensuring precise alignment, mechanical stability, and repeatable contact under dynamic loading

  • Architect and detail loading and clamping mechanisms that deliver uniform pressure profiles while meeting handler, automation, and cycletime requirements

  • Design manufacturable internal fluid geometries, including microchannels and jetimpingement manifolds, in collaboration with thermal engineering teams

  • Reduce DPPM through mechanical precision, owning pedestal planarity, flatness, and uniform pressure mapping across the device interface

  • Perform manufacturingfocused tolerance and variation analysis, identifying sensitivity drivers and defining robust design margins

  • Integrate multizone heaters, sensors, and wiring paths within compact assemblies while maintaining serviceability and mechanical integrity

  • Select CTEmatched materials for sockets, pedestals, and structural components to minimize package and fixture warpage across temperature excursions

  • Develop modular, scalable CAD architectures and reusable design kits to enable rapid customization and highvolume manufacturing deployment

  • Drive Design for Manufacturability (DFM) optimization, ensuring complex evaporator and fluidintegrated geometries are cleanable, inspectable, and massproducible

  • Partner with manufacturing, reliability, and supplychain teams to define build processes, inspection methods, and production readiness criteria

  • Interface with external vendors on machining, surface finishing, coatings, and precision component fabrication

  • FAU design, CPC connector design, Silicon Photonics Test infrastructure development

What We're Looking For

  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience or Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-3 years of experience or equivalent professional experience in lieu of a formal degree

  • Strong mechanical design experience in precision hardware, semiconductor test infrastructure, or hightolerance assemblies

  • Demonstrated expertise in tolerance stackup, compliant mechanisms, and mechanical interface design

  • Proficiency with 3D CAD tools (e.g., NX, SolidWorks, Creo, or equivalent) and drawing standards preferred

  • Solid understanding of materials, CTE mismatch, contact mechanics, and manufacturability constraints

  • Experience working closely with thermal engineers and fluidbased cooling designs preferred

  • Ability to translate complex requirements into clear mechanical architectures and detailed designs

  • Strong communication skills and comfort leading technical discussions across disciplines

  • Experience with semiconductor test sockets, handlers, or thermal head assemblies preferred

  • Familiarity with highvolume manufacturing and DPPMdriven quality programs preferred

  • Exposure to fluidintegrated mechanical designs and precision machining limitations preferred

  • Experience supporting prototype bringup, lab validation, and production ramp preferred

  • Prior leadership on crossprogram platform or infrastructure designs preferred

Expected Base Pay Range (USD)

100,300 - 150,200, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-TT1
Applied = 0

(web-77cf7d65c7-tswzx)