Technical Leader/senior Hardware Engineer - Hardware System & Board Failure Analysis
Tata Consultancy Services | |
$100,000 - $150,000
| |
sick time, 401(k)
| |
United States, California, San Jose | |
Oct 28, 2026 | |
|
Job Description
Must Have Technical/Functional Skills
or related field with 10+ years of progressive experience in hardware engineering, board design, or system-level failure analysis.
DDR4/5, HBM, 56G/112G/224G SerDes, optical transceivers).
(multi-phase VRM transient droop, PMBus/SVID telemetry, switching noise) and high-speed signal integrity anomalies.
laboratories through component-level physical FA.
Key Responsibilities
complex system failures spanning hardware, signal integrity, power delivery, thermal dynamics, and firmware.
direct lab engineers/technicians in executing test plans on high-speed boards and multi-chassis systems.
Architecture, Signal Integrity (SI), Power Integrity (PI), Mechanical/Thermal, Diagnostics, and Software engineering teams.
houses (OSATs) to drive component-level physical FA (CSAM, X-Ray, FIB, SEM/EDX, decapsulation, micro-probing).
(DFR), Design-for-Debug (DFD), and Design-for-Manufacturing (DFM) requirements into next-gen hardware.
Salary Range: $100,000 - $150,000 a year #LI-CM2
TCS Employee Benefits Summary: Discretionary Annual Incentive. Comprehensive Medical Coverage: Medical & Health, Dental & Vision, Disability Planning & Insurance, Pet Insurance Plans. Family Support: Maternal & Parental Leaves. Insurance Options: Auto & Home Insurance, Identity Theft Protection. Convenience & Professional Growth: Commuter Benefits & Certification & Training Reimbursement. Time Off: Vacation, Time Off, Sick Leave & Holidays. Legal & Financial Assistance: Legal Assistance, 401K Plan, Performance Bonus, College Fund, Student Loan Refinancing.
Location
San Jose, CA
Function
TECHNOLOGY
Role
Senior Engineer
ID
435258
Skills
Signal processing
Salary Range
$100,000 - $150,000 | |
$100,000 - $150,000
sick time, 401(k)
Oct 28, 2026