Principal FPGA Design Engineer

THE ROLE:

AMD's Network Technology Solutions Group (NTSG) is seeking a Principal FPGA system engineer to provide technical leadership in the architecture, design, development, integration, and validation of complex board-level products utilizing FPGAs, embedded processors, and advanced system technologies.

In this role, you will lead and own the full design lifecycle-from gathering architectural requirements, writing specs, owning the design and verification RTL, reviewing board schematics/layout, leading system bring-up, and supporting production deployment. You will work cross-functionally with system designers, diagnostics engineers, customer escalation engineers, and external vendors/ODM/JDM to deliver high-speed networking products used in AI data centers and bleeding-edge AI clusters. .

THE PERSON:

The ideal candidate is a highly experienced FPGA design engineer with strong technical leadership skills. You are detail-oriented, collaborative, and capable of driving complex technical initiatives while mentoring engineering teams and influencing cross-functional stakeholders.

KEY RESPONSIBILITIES:

• Collaborate with AMD engineering teams and ODM/JDM partners to define FPGA microarchitecture and detailed design specifications.
• Design and develop system control-path FPGAs for AMD's networking product portfolio.

• RTL Development & Verification: Develop, integrate, simulate, and verify Verilog/SystemVerilog RTL code, including custom testbench creation.
• FPGA Flow Implementation: Execute the full FPGA development flow, including synthesis, place and route, timing closure, and in-system hardware debugging.
• System-Level Integration: Collaborate directly with hardware, software and diagnostic engineering teams to drive rapid bring-up and debugging of next-generation network platforms.
• Design & Architecture Reviews: Actively participate in peer RTL code reviews, as well as PCB schematic and board design reviews.
• System bring ups domestic and oversea
• Toolchain Automation: Develop AI-skills, Python, Tcl, or shell scripts to streamline data processing and automate FPGA design workflows.

PREFERRED QUALIFICATIONS:

• 12+ years of experience in FPGA/SOC design, implementation and verification.
• Proven experience leading multiple full life-cycle FPGA designs for datacenter networking products.
• Strong knowledge of control interfaces such as PCIe, I2C, MDIO, QSPI, Ethernet, USB, LPTI and AXI.
• Expert proficiency with AMD/Xilinx Vivado and Vitis and Lattice toolchains.
• Deep expertise in FPGA timing closure, floorplanning, CDC analysis, pipelining, and area/performance optimization.
• Strong SystemVerilog and/or Verilog design and verification experience.

ACADEMIC CREDENTIALS:

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.

LOCATION:

Santa Clara, CA