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Silicon Validation Software Engineer: CPU and Memory Hierarchy
Apple, Inc. | |
United States, Texas, Austin | |
Jul 18, 2024 | |
Summary
Posted: May 23, 2024 Role Number: 200452847 Would you like to work on SW that runs on every Apple phone, pad, and Mac computer in the world? Join our team of experienced SW engineers and debuggers in validating Apple's world class silicon. In this highly visible role you will be writing functional validation SW for the CPUs, caches, and memory subsystem of our SoCs, with the aim of identifying logic design and circuit bugs. You will be a SW developer for a system validation tool used widely across Apple's Silicon Engineering group, and will collaborate with SoC design and product engineering teams to debug and drive silicon issues to root-cause. Description - Work with designers and architects to understand the functionality of various blocks in the SoC - Create validation test plans, ensuring all key features are covered - Develop SW workloads to validate various CPU and memory subsystem features - Integration of these workloads into an existing system validation tool - Make enhancements to the tool's SW framework to support new CPU architectures - Drive the bring-up and execution of our validation SW in pre-silicon (FPGAs) and post-silicon (development boards) - Debug workload failures using a variety of tools and hooks - Release and distribute our system validation SW to cross-functional teams across Apple Key Qualifications
Education & Experience BS and a minimum of 10 years relevant industry experience Additional Requirements More
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