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STA Engineer

Apple, Inc.
United States, California, Cupertino
September 18, 2023
Posted: Jul 24, 2023
Role Number: 200491762
Imagine what you could do here at Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the outstanding and great opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day. Are you ready to join a team redefining hardware technology? We are searching for a hardworking engineer to join our exciting team of problem solvers. Join our team and be responsible for groundbreaking IP development and coordinating with multiple SOC teams. In this role, you will work collaboratively with various SOC teams to complete design and integration tasks for the high quality IP deliverables.
Key Qualifications
  • Have good concepts of ASIC design timing closure flow and various methodologies.
  • Proven experience in ASIC timing constraints generation and timing closure. Expertise in STA tools (Primetime) and flow.
  • Have concepts of timing corners/modes, process variations and signal integrity related issues.
  • Hands on experience in timing/SDC constraints generation and management.
  • Exposure in scripting languages (TCL and Perl).
  • Have background in Constraint analysis and debug, using industry standard tools such as Synopsys GCA (Galaxy Constraint Analyzer).
  • Have experience in timing closure of various test modes such as scan shift, scan capture, atspeed and Bist testing.
  • Self-starter and highly motivated
- As an ASIC Integration Engineer, you will have responsibilities spanning various aspects of SOC design: - Full chip and block level timing closure ownership throughout the entire project cycle (RTL, synthesis and physical implementation. - Generation of block and full chip timing constraints. - Work on Apple SoC (System-on-Silicon) chips in deep sub-micron technologies targeted for high end mobile applications. - Work with various multi-functional teams on resolving complex timing issues for major building blocks of complex SoCs.
Education & Experience
Bachelor's Degree + 0 years of experience
Additional Requirements
Pay & Benefits
  • At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $55.81 and $84.08/hr, and your base pay will depend on your skills, qualifications, experience, and location.

    Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. about Apple Benefits.

    Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.